Home Previous Next


Event Status Register (ESR) and Event Status Enable Register (ESE)

The ESR is defined in IEEE 488.2. It can be compared with the EVENt part of an SCPI register. The event status register can be read out using command "*ESR?".

The ESE is the associated ENABle part. It can be set using the command "*ESE" and read using the command "*ESE?".

Meaning of the bits used in the event status register

Bit No. Meaning

0

Operation Complete

  This bit is set on receipt of the command *OPC exactly when all previous commands have been executed.

2

Query Error

  This bit is set if either the controller wants to read data from the instrument without having sent a query, or if it does not fetch requested data and sends new instructions to the instrument instead. The cause is often a query which is faulty and hence cannot be executed.

3

Device-dependent Error

  This bit is set if a device-dependent error occurs. An error message with a number between -300 and -399 or a positive error number, which denotes the error in greater detail, is entered into the error queue (cf. SCPI Error Messages).

4

Execution Error

  This bit is set if a received command is syntactically correct but cannot be performed for other reasons. An error message with a number between -200 and -300, which denotes the error in greater detail, is entered into the error queue (cf. SCPI Error Messages).

5

Command Error

  This bit is set if a command which is undefined or syntactically incorrect is received. An error message with a number between -100 and -200, which denotes the error in greater detail, is entered into the error queue (cf. SCPI Error Messages).

6

User Request

  This bit is not used in the CMU.

7

Power On (supply voltage on)

  This bit is set on switching on the instrument.

Home Previous Next